Beyond CMOS (WP2)
Leader: Prof. Heinrich Kurz, RWTH (Germany)
The end of road for continuous CMOS scaling becomes in sight. Around 2020 scaling is expected to hit the “Red Brick Wall” due to physical, technological and economic constraints. Workpackage 2 “Beyond CMOS” addresses these issues and tries to give a foresight to future nanoelectronic components. The most emerging topics have been identified and will be directly supported as “Flagship Projects” or integrated as an “Associated STREP”:
All other ideas going far beyond these topics will be discussed in the “Beyond CMOS" Visionary Project (coordinated by RWTH).
The participants will have periodic workshops to discuss recent own results and global trends / publications. The aim is to provide a base for exchange and discussion, to stimulate the cooperation between other activities within NANOSIL and to identify project specific methods.
Most of these research activities are funded by national and international research projects. WP2 will condense these activities in the field of future nanoelectronic components and devices for memory and logic applications.