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January 2011
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Consortium area
SINANO INSTITUTE
Public Area

Objectives

NANOSIL will explore and assess the science and technological aspects of nanodevices and operational regimes relevant to n+4 technology node and beyond. It will provide a forward-look for the industry, enabling informed decisions to be taken on technology development in order to speed up technological innovation. It will encompass flagship projects on nanoscale CMOS and post-CMOS. The activities will thus be centred on the “More Moore” and “Beyond-CMOS” domains but natural links will also been established with the other ENIAC areas.


Within the Network there are all the critical facilities and expertise to occupy and transcend this space. We will propose innovative concepts, technologies and device architectures- with fabrication down to the finest features, and utilising a wide spectrum of advanced deposition and processing capabilities, extensive characterisation and world leading device modelling. This work will be carried out through a network of joint processing, characterisation and modelling platforms. The consortium will work closely with and take steering from European industry. It will feed back data and know-how on materials and devices that deliver the required performance. This critical interaction will strengthen European integration in nanoelectronics, help in decision-making by industry and ensure that Europe remains at the forefront of nanoelectronics for the next 2 – 3 decades.


The activities of the NANOSIL Network are divided into six workpackages: